Today, electronic devices are used in every field, and these are rapidly reduced in size. In accordance with that, printed interconnect boards used in devices are reduced in size and the interconnect density becomes remarkably dense and complex.
As an efficient method of manufacturing small printed interconnect boards, a method of obtaining a large number of small printed interconnect boards from a single large base material for printed interconnect boards is known. While printed interconnect boards are reduced in size, base materials for printed interconnect boards are increased in size in order to increase production efficiency.
When performing electroplating on a large base material for printed interconnect boards to form a conductive pattern, a variation in a plating film thickness tends to occur. For this reason, even when printed interconnect boards are obtained from one base material for printed interconnect boards, printed interconnect boards having a plating film thickness thinner than a designed value or printed interconnect boards having a plating film thickness thicker than a designed value are tend to be generated. In some cases, there is a possibility that printed interconnect boards that cannot be used as products are generated.
In order to avoid such a situation, a method of forming a plating layer having a uniform thickness by physically making holes in the outer frame region of a base material for printed interconnect boards, by forming a round or square conductive pattern, or by applying a mask is disclosed (Patent Document 1). Although the method enables to form a plating layer having a uniform thickness, it is desired to form a plating layer having a uniform thickness for a more precise circuit pattern and for a large-sized base material for printed interconnect boards with reducing a manufacturing step.